June 6th and 7th, 2013

 

 

 

 

         
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Tutorial
June 6th

Conference Day
June 7th

Location : Co-located with DAC : Austin Convention Center

Design For Test (DFT) 101
Teacher – Carl Barnhart (SiliconAid Solutions)

START TIME - 8:30AM
LUNCH 12-1PM
WRAP UP - 5PM

Description - Introduction to the concepts of Design-For-Test and its justification and trade-offs. The day starts with basics of DFT covering the classic fault models (stuck-at, bridging and propagation delay) and their relevance to modern-day silicon defects. Most of the day is devoted to the DFT technique of internal scan, Memory BIST, Logic BIST and Compression, and some of the most used DFT related IEEE Standards: The day concludes with a review of some practical DFT guidelines.

8:30 - 9:00 On site Registration (coffee provided)

  • Introductions and Agenda
  • LUNCH - Free lunch sponsored by SiliconAid

5pm - Class ends

5:30pm – 7:30pm – SWDFT Reception (Sponsored by Mentor Graphics)

 

Location : OMNI SOUTHPARK Hotel

AGENDA
8:00 - 8:30 On site Registration (coffee provided)
8:30 - 8:40 Welcomes and introductions
 8:40 - 9:10 Key Note Address – Wally Rhines (CEO Mentor Graphics) Title - 3 Discontinuities in DFT, Present and Future

Session 1
9:10 - 9:50 - Presentation 1 - Bill Eklow (Cisco)
                  Title - Test Roadmap for Semiconductor Industry
9:50 - 10:30 - Presentation 2 - CJ Clark (Intellitech)
                  Title - 1149.1-2013 Major changes
 10:30 - 11:10 B R E A K
 11:10 – 12:10 – Presentation 3 - Sponsor Presentations
                  Mentor - Cell Aware
                  ASSET - FCT, IJTAG, and HVM with ScanWorks
 12:10 - 1:30 LUNCH - Free lunch

Session 2
1:30 – 2:10 - Presentation 4 - Jeffrey Roehr (Texas Instruments)
                  Title - DFT Tricks to enhance Adaptive Test
2:10– 2:50 - Presentation 5 - Jennifer Dworak (SMU)
                  Title - Security for Chips
2:50 - 3:30 - Presentation 6 - Brady Benware (Mentor Graphics)
                  Title - Diagnostics and Yield Enhancement
3:30 - 4:10 B R E A K

Session 3
4:10 – 4:50 - Presentation 7 - Rich Slobodnik (ARM)
                  Title - ARM IP - Multicyle Paths and Test
 4:50 – 5:30 - Presentation 8 - Michel Wang (Freescale)
                  Title - On Die Instruments
5:30 - 6:30 - Panel Discussion Referee: Jim Johnson
5:30 - 6:30 Happy Hour during Panel